SUMMER INTERNSHIP Digital Design using Verilog and Prototyping with the FPGA



Department of  Electronics and Telecommication In Association With VESIT-IIC And VESIT-IQAC
Presents
SUMMER INTERNSHIP   Digital Design using Verilog andPrototyping with the FPGA
th
DATE: 13 MAY, 2024 TO 1st JULY, 2024
Mr. Mrugendra Vasmatkar
Faculty Coordinator
Mr. Dsouza Alrich Xavier
Student Coordinator
VESIT
IIC
Dr. Chandan Singh Rawat
HOD,
Department of Electronics And
Telecommunication





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