The Department of Electronics & Computer Science and Automation & Robotics is offering a winter internship on "Innovative FPGA Design: SERDES and Sigma-Delta ADC Projects"  from 1st Dec, 2024 to 15th Jan, 2025, under the Chips to Startup (C2S) Program, for second and third year students of VESIT. The internship will cover the following key projects:

1. Designing subblocks of SERDES (serializer and deserializer) for high-speed communication.
2. Developing a synchronization block and reconfigurable digital filter for Sigma-Delta ADCs.

 PFA poster for the same.