Swadeshi Microprocessor Challenge -2020

The Swadeshi Microprocessor Challenge -2020 is organized by the Ministry of
Electronics and Information Technology, Govt. of India in collaboration with C-DAC,
IIT Madras, MyGov and MakerVillage under #AatmaNirbharBharat Abhiyan.
There is a growing need for Swadeshi Compute Hardware, which would be a part of every
Smart Device deployed in different domains, from Electronics for public utility services such
as Surveillance, Transportation, Environmental condition monitoring; to commodity
appliances like smart fans/ locks/ washing machines. In addition, with growing penetration of
smart electronics in strategic areas including Space, Defence and Nuclear energy, the need
for Swadeshi Compute Hardware is crucial. It is not just the cost or embargo that drives this
need, but also the dependence on external vendors, long term sustenance, quick
enhancements to suit the ever-growing requirements, and most-importantly Security, which
drives #AatmaNirbharta in Hardware domain, as the only option.
Under Microprocessor Development Programme spearheaded by MeitY at C-DAC, IIT
Madras and IIT Bombay, not only has the family of industry-grade Microprocessors been
designed from scratch but also the compute ecosystem around them has been evolved as a
step towards meeting India's future requirements.
To provide further impetus to the strong ecosystem of start-ups, innovators & researchers in
the country, MeitY announced that Swadeshi Microprocessor Challenge will be made
available by IIT Madras (शक्ति processors) and C-DAC (वेगा processors), and it will be
powered by FPGA Boards of XILINX which is supported by CoreEL Technologies. This, in
turn, will promote a culture of innovation and entrepreneurship, by taking up complex
designs in the country and innovate frugal solutions around home-grown processor ecosystem
that will cater to both, global and domestic requirements. The incubation to support the
winning teams will be provided by an Incubator located at their geographical proximity,
coordinated by Maker Village. This is a major step towards achieving the self-reliance in the
hardware domain.
Out of 6000 teams in Swadeshi microprocessor challenge-2020, three teams from VESIT
were selected in top 100 who made it to the semi-finals. Each Semi-finalist will get a funding
of Rupees 100000/- (one lakh) towards creation of start-up and project expenses.
The details of the three Semi-finalist teams from VESIT are as follows.
Team 1:
1. Mrs. Asma Parveen I. Siddavatam (Assistant Professor, Dept. of Information
2. Mr. Ajit T Patil (ME Instrumentation)
Team 2:
1. Mr. Mrugendra Vasmatkar (Assistant Professor, Dept. of Electronics and
Telecommunication Engineering)
2. Paarth Arkadi (BE Electronics)

3. Vaibhav Ghaisas (BE Electronics)
4. Amogh Gajre (BE Electronics)
5. Shubham Singh (BE Electronics and Telecommunication Engineering)
Team 3:
1. Mr. Gopalakrishnan N (Assistant Professor, Dept. of Instrumentation
2. Mrs. Lekshmi Ajesh Kaimal (Senior Research Fellow, Dept. of Instrumentation

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