The Department of Electronics & Computer Science and Automation & Robotics is offering a winter internship on "Innovative FPGA Design: SERDES and Sigma-Delta ADC Projects"  from 1st Dec, 2024 to 15th Jan, 2025, under the Chips to Startup (C2S) Program, for second and third year students of VESIT. The internship will cover the following key projects:

1. Designing subblocks of SERDES (serializer and deserializer) for high-speed communication.
2. Developing a synchronization block and reconfigurable digital filter for Sigma-Delta ADCs.

 PFA poster for the same. 

RUBY JUBILEE 

DEPARTMENT OF ELECTRONICS & COMPUTER SCIENCE

TECH BOOTCAMP

One Week Workshop
15th July 2024- 20th July 2024
FACULTY CO-ORDINATORS
Dr.Rajani Mangala
Dr.Asawari Dudwadkar
Mr.Yogesh Pandit

VENUE

ROBITICS LAB (Second Floor)

VLSI workshop and Internship under Chips to Start up (C2S)  program in collaboration with Panache Digilife India Ltd from 14th May to 15th July, 2024.

Department of Electronics and Computer Science Department of Automation and Robotics
Workshop
and Internship in VLSI In collaboration with Industry Partner
About the Workshop and Internship:VESIT ZIIC
In association with IQAC - VESIT
V.E.S. Institute of Technology has received a grant of Rs. 82.59 Lakh under the
Chips to Startup Program (C2S) from the Ministry of Electronics and
Information Technology(MeitY) in collaboration with M/s Panache Digilife
Limited. This workshop and Internship aims at developing Specialized
Manpower in the VLSI/Embedded System Design domain.
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BANY B
2024/2/21 13:37
BAR BLOLA
What you will learn:
• Verilog Programming and FPGA prototyping using Vivado.
• Full custom design and simulation with layout using Cadence EDA tools
•
Memory Design with a controller from Schematic to GDS using Cadence
EDA tools.
Internship:
• The internship selection process is based on a written test after the workshop.
Projects offered are in collaboration with the Industry.
•
WORKSHOP
14 to 28 May 2024*
* Check the schedule
Coordinators
Dr.Nilima Warke(AU&RO)
Dr.Jayamala Adsul(ECS)

Under the guidance of Internal Quality Assurance Cell (IQAC) In Association with Institution’s Innovation Council (IIC)
Vivekanand Education Society’s Institute of Technology Department of Electronics and Computer Science

Organizes a session on

“Scope/Opportunities of VLSI in INDIA”

Speaker

Ms. Archita Malgaonkar
MTech in Semiconductor Materials and Devices
Indian Institute of Technology, Hyderabad

Coordinator
Mr. Yogesh Pandit

Date: - 1st April,2024 Venue: -B21 Time: -1:30 pm onwards

In Association with VESIT-IIC and VESIT-IQAC Department Of  Electronics and Computer Science Engineering
Organizes SCI-TECH FAIR '24
Project Exhibition
(Innovative and Novel Idea Presentation)

Date: 23th March 2024
Time: 10:30 am to 12:00pm
Venue: Lab 201, 202, 205, 215

Co-ordinators
Dr. Jayamala Adsul,

Mr. Yogesh Pandit